Amir Hekmatpour

Vita	Career Objective
Previous Projects	Education
Patents & Copyrights	Teaching
Publications	Research Interests
Invited Talks & Seminars	Awards

Vita
2013 - Present	Chief Healthcare Information Systems and Technology Advisor - CURE Healthcare Management Services, USA (UAE Office) Advise CMS Senior Management and CMS Clients in Middle East, Asia and Africa on selection, deployment, integration and optimization of Healthcare Information Systems and associated Technologies and Services, including; Hospital Information System (HIS), HMS (Hospital Management System), EMR, EHR, LIS, PACS, RIS, eAuthorization, eClaim, ePrescription, Big Clinical Data and Clinical Analytics, Alergy-Drug-Drug Predictive Analysis, Document Management Systems(DMS), PaperLess Patient Medical Recods, Policy Management Systems, JCI Accreditation Policies, Measurables and Traces, Health Care Quality Management Systems, Organization and Operations Analytics and Dashboards, Collaborative Healthcare Services, Intelligent and Integrated Health Engines, Clinical Coding(CPT, ICD, DRG, E&M,...) for Service Quality and Financial Analysis, Environment and Patient Safety Plans and Assessment, Infection Control and Management Processes & Policies, and Nursing/Clinical Informatics development/utilization for Operations Automation and Quality improvement.
2012 - 2013	Senior Vice President Chief Quality and Information Officer - Oasis Hospital, Al Ain, UAE. Devise technology-enabled secure strategies for lean health care servicesacross the hospital and outpatient clinics (HIS, Appointment and Registration, eClaim, ePrescription, LIS, PACS) and implement across IT infrastructure (Servers, LAN, WAN, SAN, Routers/Switches/GateWays, VPN, Email, ERP, DBs, DBMSs, Web-based Interfaces, Backup & Disaster Recovery Strategy, Data Governance, Server Redundancy for 24/7 Critical Hospital Operations, IT Policies), ensuring Quality patient care (Clinical and Quality Policies, KPIs, Dashboards, eForms, Policy Management System, Policy Cross-Referencing and Search Engine), with an efficient and secure Medical Records operations (MR Policies, eForms, Document Management System, Master Patient Index, migration plan to EMR, Patient File Audits, UAE Regulatory Reports, KPIs). Plan and prepare the hospital for its 3rd JCI accreditation by ensuring all the necessary policies and procedures are upto-date, deployed and integrated into the patient care service operations. Devise JCI traces and mock surveys for all critical clinical and non-clinical operations of the hospital. Provide leadership and direction for data and user security, continuous quality and patient safety improvement by integrating health care analytics and regulatory compliance business intelligence in all critical services and operations. Devise IT & MR transition to the new Hospital Building ensuring 24/7 operations during transition at both existing (old( and New Hospital Buildings. Nourish and empower a culture of Integrity, Quality, Automation and Security - Analyze. Simplify. Automate. Integrate.
2011 - 2012	Chief Technology Advisor, Office of The CEO - Oasis Hospital, Al Ain, UAE. Research, evaluate, advise and make recommendations to the senior management team regarding the safety, security, integrity and capacity of the existing IT infrastructure, hospital medical technology infrasturcture and the health care information system architecture strategy in order to provide an international standard of quality healthcare and services to the Al Ain and the surrounding communities in the United Arab Emirates. Formulate long-term IT infrastructure Data Security and integrity strategy and the overall clinical technology vision to support the growth strategy providing an state-of-the-art health care services in the new hospital building.
2006 - 2011	Senior Scientist/Engineer, IBM System and Technology Group, Denver, Colorado High Speed Serial Links, Design For Test and Manufacturing Test Test lead for 3rd party (Synopsys, ARM, Rambus) Silicon IPs (SerDes, PCIe1/2/3 USB1/2/3, XIO, ...) in Cu08, Cu65, Cu45 & Cu32 nm technologies
2004 - 2010	Chair, IBM Research Triangle Park's CAD, EDA,Software Methods and Algorithms IDT (Invention Development Team) Chaired a team of experts for evaluating disclosures submitted by IBM employees. Developed CPS (Creatve Problem Solving) & US patent process training material.
2004 - 2006	Senior Scientist/Engineer, IBM System and Technology Group, Research Triangle Park, North Carolina ASIC & IP Development - Standards-based IP Design & Verification 3rd Party IP Port to IBM ASIC, BLIP: Blue IP Portal for secure web-based design spec transaction providing a user-previledge-based content access security strategy,- Web-based 3PIP Request Generator Application Architecture with user selectable encryption and key generation , Qualification, and Delivery
2003 - 2004	Senior Engineer, IBM Microelectronics, Research Triangle Park, North Carolina SoC & ASIC Design and Verification - Functional Coverage Analysis Tools & Methods
2001 - 2003	Senior Engineer, IBM Microelectronics, Research Triangle Park, North Carolina Embedded PowerPC Processor Verification - Coverage-based Functional Verification Tools & Methods
2000 - 2001	Advisory Engineer, IBM Microelectronics, Research Triangle Park, North Carolina World Wide Design Center, System-On-a-Chip Modeling, Co-Simulation & Verification
2000 - 2002	President, Iranian Cultural Society of North Carolina (ICSNC) Board of Directors (2001), President (2002), Elections Committee Chair (2003-05), Public Relations Committee Chair (2002-04), News Letter Committee (2003-04)
1996 - 1999	Advisory Engineer, IBM Somerset/PowerPC Design Center, Austin, Texas Multi-Processor (MP) Functional Verification Tools and Methodology Power PC MP Test Generation and Coverage Analysis - PPC603, PPC604, PPC740, PPC750, PPCG3, PPCG4
1996 - 1998	Senior Lecturer, University of Texas, ECE Department , Austin, Texas USA.
1995-Present	Founder & CTO:   Amir.com.
1994-1995	Advisory Engineer, IBM Manufacturing Technology Center, Boca Raton Florida Intelligent Multimedia Information Systems - ExperMedia/2
1993	PhD, Computer Engineering, University of California, San Diego
1991-1994	Staff Engineer, Knowledge-Based Systems Development, IBM, Burlington, Vermont Intelligent Decision Support Systems for Advanced Semiconductor Manufacturing
1989	MSCE, Computer Engineering, University of California, San Diego
1987-1991	Research Assistant, Dept. of Electrical and Computer Engineering, University of California, San Diego
1985-1987	Senior Associate Engineer, VLSI Design Automation, IBM, Burlington, Vermont Logic Synthesis System Development, Support and optimization rules development
1983-1985	Senior Associate Engineer, VLSI Design Automation, IBM, Rochester, Minnesota Technology Mapping (integrate and convert existing BiPolar designs to CMOS)
1981-1983	Associate Engineer, VLSI Design, IBM, Rochester, Minnesota Circuit Design, Circuit Analysis, PLA Design and Optimization, Circuit Layout
1981	MSEE, Electronics Engineering, Information Engineering, University of Illinois, Chicago
1980-1981	Teaching Assistant, Dept. of Information Engineering, University of Illinois, Chicago
1980	BSCS, Computer Science, Dept. of Information Engineering, University of Illinois, Chicago
1979-1981	Security Guard, Kane Security Systems Inc., Chicago, Illinois
1979	BSEE, Electrical Engineering, Dept. of Information Engineering, University of Illinois, Chicago
1977-1979	Taxi Driver, Checker Cab Company, Chicago, Illinois
1976-1977	Bus Boy, Pump Room Booth #1 Restaurant, Chicago, Illinois
1976-1981	Dept. of Information Engineering, University of Illinois, Chicago
1975	Ferdowsi University, Dept. of Electrical Engineering, Mashhad
1969-1975	Math & Science Diploma, Alavi High School, Mashhad
1963-1969	Bahar Elementary School, Khajrabih Ave., Mashhad

Career Objective Research and Development of Autonomous Intelligent Systems for Secure Global Information Dissemination. My career with IBM as a Hardware and Software Research and Development Engineer and Oasis Hospital as Chief Technology Advisor and Senior Vice President of Quality and Information Technology has provided me with a diverse background that allows me to operate and contribute in positions requiring a broad and comprehensive hands-on technical perspective. I enjoy creating and maintaining highly enthusiastic and "CAN DO" attitude R&D teams and providing the technical and personal leadership required for fostering innovation, quality and dynamic teamwork. My approach to R&D is practical and solution-centeric: Identify the critical component of the process, understand technologies associated with current solutions, find technolgies' weak points (or missing features), develop an integrated and extensible system architecture encompassing novel features and applications - incorporating best-of-the-breed technologies, emerging techniques and novel solutions.

Long-term Career Objective Teaching, Research in the field of Information Technology and Intelligent Information System Architecture and Security-aware IT infrastructure. Hobby: R&D in the field of Life, its Creator(s) and all possible Bi-directional sustainable interactions and relationships between the Creator(s) and the created life forms - independent of time and space but including the eternity.

Recent Projects Oasis Hospital 4/2012 - Present Senior Vice President of Quality and Information Technology Responsible for the overall IT & Quality strategies and implementation of secure patient-centered continuous quality and process improvement through the use of technology and data-centric analytics. The focus of my responsibilities has been to ensure secure 24/7 IT infrastructure and providing technology-enabled patient care tools and resources across all functions in the hospital. I have been responsible for devising and implementing wired and wireless access and data security strategies and proactive disaster recovery plan for all critical systems supported by IT. Devising methods (hardware & software-based) to ensuring patient data access/control security management has been a challenge for the current IT infrastructure as well as the new Building IT infrastructure . in order to be able to support both legacy and state-of-the-art hardware (routers, switches, VM servers, Server Clusters, SAN, LAN, WAN,...) and software (Hospital Information system, Oracle ERP, Active Directory, Firewalls, Authentication & Encryption utilities, Databases, ...). In addition, to provide data integrity across networks and databases for a heterogeneous set of web, desktop and server applications has required devising new security policies for data, access, user authentication, BYOD and desktop self management. Initiated continuous network monitoring for intrusion and unauthorized data push/pull. On the Quality side, I have focused on nourishing and empowering a culture of continuous quality and patient safety improvement by integrating health care analytics and regulatory compliance business intelligence in the hospital services and operations. My tactical approach has been to Research, Analyze, Simplify, Automate and Integrate to improve the Hospital operations. security, quality and efficiency. Devise technology-enabled lean health care services strategies and implement across Quality, IT and Medical Records operations. Nourish and empower a culture of continuous quality and patient safety improvement by integrating health care analytics and regulatory compliance business intelligence in all critical services and operations. Analyze. Simplify. Automate. Integrate. Oasis Hospital 9/2011 - 3/30/2012 Chief Technology Advisor I was commissioned to research, evaluate, advise and make recommendations to the senior management team regarding the IT infrastructure security, data integrity and capability for 24/7 critical system support. I evaluated a Hospital Information System EMR under development from system architecture and patient data integrity point of view . with special emphasis on system performance bottlenecks, data corruption and authentication spoofing vulernability across different clinical modules (a central EMR) and generated an extensive data management and security architecture improvement report. Defined a strategy for a cloud paper-less clinical eForm and document management system with special attention to deterent and detective security controls to ensure easy access to forms, documents and corresponding data from inside and outside of hospital LAN/FireWall. I was also responsible for formulating long-term technical vision to support the growth strategy while providing state-of-the-art quality health care services. Research, evaluate, advise and make recommendations to the senior management team regarding the existing IT infrastructure, hospital medical technology infrasturcture and the health care information system architecture strategy in order to provide an international standard of quality healthcare and services to the Al Ain and the surrounding communities in the United Arab Emirates. Formulate long-term IIT and Data Security strategy and the overall clinical technology vision to support the growth strategy providing an state-of-the-art health care services. IBM, Systems & Technology Group, Silicon Solutions Engineering, Denver, Colorado 9/2006 - 4/30/2011 Senior Engineer - Mixed-Signal High Speed Serial Links MFG Test Engineering Lead Responsibilities: Manufacturing test plan development and execution for 3rd party (Synopsys, Arm, Rambus) high speed Mixed-Signal SerDes (PCIe1/2/3, USB1/2/3, XIO,) ensuring compatibility with IBM ASIC test requirements and manufacturing test and qualiity methodology. Defining the test architecture (LSSD, GSD with IP Analog and/or digital fenced off, or LSSD pass-through with IP fenced off) and the appropriate test suites (from ATPG pattern generation, to macro test generation or parametric macro tests). Devising methods for incorporating 3PIP's JTAG, Boundary Scan structures and TAP controller features into IBM ASIC. Generating MFG test patterns and test models via Encounter in conjunction with the appropriate MIC/MPR/TMD/TPGTECH/... for IBM advanced process manufacturing test processes. Coordinating test chip/test board/burn-in board design, processing, and delivery to MFG test for verification of macro test suites and optimization of parametric limit values and generating a comprehensive MFG test specification (Engineering Manufacturing Test Specification: EMTS) for final product MFG test (at wafer and module level) and stress/qualification. IBM, Microelectronics, Research Triangle Park, North Carolina 6/2004 - 4/2010 IDT Chair: Proposed a new specialized IDT (Invention Development Team) for assessing and promoting inventions in the Integrated Circuit Design Analytics and platforms. Assembled, Trained and Chaired a team of IBM experts for evaluating disclosures submitted by IBM employees in the field of Design Automation Methods, Software Architecture and Algorithms. Developed CPS (Creatve Problem Solving) training presentations, mentored young IBM inventors and provided training sessions on the US patent process. IBM, Microelectronics, Research Triangle Park, North Carolina 9/2005 - 9/2006 Senior Engineer - Mixed-Signal 3rd Party IP (3PIP) Acquisition & Verification Technical Project Management Responsibilities: Provided technical lead from early Vendor and IP selection and evaluation to contract negotiation ensuring all manufacturing test requirements are addressed and appropriate test architecture (i.e. compatible with IBM ASIC Test) is supported. In addition, managed the qualification and stress planning, scheduling and coordination between vendor test chip development and IBM MFG test methodology. All aspects of 3PIP design and porting to IBM ASIC had to be coordinated with IBM ASIC customers (internal and external) and IBM HSS test engineering. IBM, Microelectronics, Research Triangle Park, North Carolina 5/2004 - 9/2005 Senior Engineer - IP Acquisition & Verification Responsibilities: Research and development of methods and systems for Third Party IP (3PIP) qualification, certification and verification. Development of industry standards for 3PIP spec and data exchange and analysis. Development of an integrated Web-based 3PIP Portal (aka IBM Blue IP Portal) for collaborative IP specification, qualification, cerification and design data exchange. IBM, Microelectronics, Research Triangle Park, North Carolina 1/2003 - 4/2004 Senior Engineer - SoC & ASIC Design and Verification Responsibilities: Research and development of methods and systems for verification of the next generation of System-on-a-Chip designs including, Functional, interconnect, toggle, and BUS protocol verification. Research and development of Web-based SoC verification coverage and protocol compliance analysis methods and systems. Results: FoCuS2: A web-based system for Coverage-Driven Functional Verification of Integrated Circuits. Including WebCover2: an enhanced database-driven Web Portal, CovSigMa: A Coverage Modeling and Analysis Engine, and Harvester: A Multi-Algorithm regression suite generation and optimization framework. SoCVer: A web-based system for automatic block-level assertion generation for SoC interface and interconnect validation. IBM, Microelectronics, Research Triangle Park, North Carolina 2/2000 - 12/2002 Senior Engineer - IBM PowerPC Embedded Processor Design Center Responsibilities: Research, and development of a comprehensive integrated functional coverage analysis methodology and environment to support random and deterministic functional verification of embedded PowerPC processors in general and PPC440, PPC440FPU, PPC442, PPC446 and follow on remaps and derivitives. Results: The resulting system called Focus includes several analysis and management modules such as; WebCover: Web-based Coverage Analysis and Reports, CAnE: Coverage Analysis Environment Management, Director: Verification Directive Generator, RegressionDB: Coverage-based Regression suite generation, Tabulator: Architectural Coverage Analysis, etc. Focus provides continuous (24/7/365) monitoring, analysis, and optimization of random functional verification of processor design, across a distributed server farm, in a heterogeneous design and verification environment supporting Verilog and VHDL mix-designs, cycle and event simulators, Verilog/VHDL/C++/PSL assertions across AIX and Linux servers. Focus's integrated FocusDB MySQL database provides on-demand coverage and verification intelligence and web-based design and data management via WebCover. IBM, PowerPC Somerset Design Center, Austin, Texas 4/97 - 02/2000 Advisory Engineer - VLSI Design Automation Engineer Responsibilities: Research, development and support of Somerset PowerPC Multi-Processor test generation tools and methodology for G4 & G5 PPC family. In particular, to provide project lead, development, methodology and user support for the IBM Genie (Genesys) test generator. As the project lead I have been responsible for coordinating my development at Somerset design center with IBM Haifa Research Lab (Generator) and IBM Rochester Lab (Simulator) for timely support of G4 & G5 MP verification plans. The development responsibilities included developing Genie infrastructure (including DB2 server and clients, Genie Build and Release environments), G4 & G5 architectural knowledge-bases, corresponding heuristic testing knowledge, test post-processing utilities, release regression test suites, user training materials and online user guides. The methodology support included working closely with and providing system requirements to RTX, QMAN and SIMULATOR developers to ensure seamless integration of Genie and its tests within Somerset simulation environment. In addition, played a key role in the Somerset unified test generator migration plan and the common reference model utilization across all generators. User support has included training verification engineers to properly utilize Genie consistent with their projects' MP verification plans. www.macosrumors.com/ on Thursday, Nov 12, 1998 IBM, PowerPC Somerset Design Center, Austin, Texas 9/95 - 4/97 Advisory Engineer - Verification Engineer Responsibilities: Participated in PowerPC 604 and 604+ verification, test generation and debug. 604 silicon verification and bug fix verification. 604+ MP test generation and verification. PowerPC 750 (G3) architectural verification. 604e MP coherency verification and BIU coverage assessment. 603e and 603ev PPC compliance verification. Functional coverage tools and methodology assessment. Development, support and maintenance of 604e verification website and all member pages. Tools utilized: RTPG, MPRTPG, MPTG, Genie, Genesys, AVS, TexSim, Mephisto, XVS, Qman, BusWatch,... IBM, Manufacturing Technology Center, Boca Raton, Florida, 9/93 - 9/95 Advisory Engineer - EM/2 Project Architect/Lead Responsibilities: Project management, system enhancement, application development, customer support and marketing of ExperMedia/2. Defined and implemented new features and capabilities for ExperMedia/2 (based on usability analysis, customer requests and feedbacks). Upgraded and maintained the EM/2 Media Lab. Provided support to EM/2 projects and customers at IBM manufacturing in Vermont, San Jose, and Austin. Evaluated stereographics and VR-based interfaces for process control in manufacturing and as new features for EM/2. Developed a prototype of an adaptive GUI for EM/2. Provided customer training via on-site seminars and hands-on courses on knowledge-based systems and intelligent multimedia information systems. IBM, Knowledge Based Systems Development, Burlington, Vermont, 9/91 - 9/93 Staff Engineer - Development Engineer Responsibilities: Research and development of Intelligent systems for IBM's manufacturing enterprise in general and semiconductor manufacturing in particular. Served as lead architect and developer of ExperMedia/2: a multimedia expert system shell for semiconductor manufacturing process control. ExperMedia/2 was developed in OS/2 using C, PM, DM, IPF, REXX, and Smalltalk. Designed a set of hypermedia GUI templates for rapid prototyping and consistent development. Developed knowledge engineering and expert system development and deployment guidelines for IBM semiconductor manufacturing. Developed and coordinated development of several large scale multimedia knowledge-based systems based on EM/2 for IBM manufacturing in Vermont and San Jose. UCSD, Department of Electrical and Computer Engineering, San Diego, 9/87 - 9/91 Research Assistant - Ph.D. Candidate Responsibilities: Research and development of an AI-based architecture and reasoning algorithm for automation and management of VLSI design process. An object-oriented architecture for hierarchical knowledge representation. Knowledge-based techniques for VLSI design. User modeling and cognitive load analysis for the resulting knowledge-based systems (A joint research with the cognitive science department). Prototyping of the resulting knowledge representation architecture, inferencing algorithm and GUI templates in NEXPERT OBJECT, C, and X11 on SUN workstation. In addition participated in logic design, capture, and simulation of a bit-serial adder for an ultra low power bit-serial DSP processor for Hughes Aircraft Co. of Carlsbad California. This design activity was carried out on Apollo workstation using Mentor Graphics and UCB VLSI CAD tools. IBM, VLSI Design Automation, Burlington, Vermont, 9/85 - 9/87 Senior Associate Engineer, VLSI Design Automation Engineer Responsibilities: Local development, deployment and customer support for Technology Mapping System (TMS) and Logic Synthesis (LTS, LSS). Participated and provided tool support for conversion of several existing IBM microprocessors and TCMs from Bipolar to advanced CMOS technologies. Provided corporate wide training on "Technology Mapping" and "Logic Transformation". Performed human factors analysis and made proposals for GUI and knowledge-based user interfaces for the above tools. IBM, VLSI Circuit Technology, Rochester, Minnesota, 4/81 - 9/85 Associate Engineer, VLSI Design Engineer Responsibilities: Design and analysis of fast NMOS buffers. Design and layout of a dense PLA library using 45 degree extended devices. Design and analysis of low power CMOS drivers. Metastability and latchup analysis of CMOS library cells. Participated in development and customer support of Bipolar logic cards conversion to CMOS (technology mapping), automatic transformation and optimization of existing VLSI designs to newer technologies (logic transformation & synthesis), generation of test parts for the new BTV CMOS technologies, and design and analysis of a cascade voltage switch library. UIC, Department of Information Engineering, Chicago, 3/80 - 3/81 Responsibilities: Design, analysis, and layout of an NMOS control logic for a CCD-based robot vision system. UIC MSEE Thesis project. Kane Securities, Chicago, 9/79 - 3/81 Responsibilities: Security guard Checker Taxi Cab Company, Chicago, 6/77 - 9/79 Responsibilities: Taxi Cab Driver Booth Number One Company, Pump Room Restaurant, Chicago, 3/76 - 6/77 Responsibilities: Food Service Assistant (a.k.a. BusBoy)

Education 6/93 Ph.D. Computer Engineering, University of California, San Diego 6/89 M.S. Computer Engineering, University of California, San Diego 3/81 M.S. Information Engineering, University of Illinois, Chicago 3/80 B.S. Computer Science, University of Illinois, Chicago 3/79 B.S. Electrical Engineering, University of Illinois, Chicago Dissertation: "A Methodology and Architecture for Interactive Knowledge-Based Diagnostic Problem-Solving in VLSI Manufacturing." UCSD, May 1993. Research Advisor: Dr. Charles Elkan Research Committee: Dr. Walter Ku, VLSI Design Research Center Dr. Larry Milstein, Wireless Communication Research Center Dr. Donald Norman, Head of Cognitive Science Dept. Dr. Charles Tu, Semiconductor Device Research Center

Patents 25) A. Hekmatpour, Azadeh Salehi "Systems, Methods, and Media for Block-based Assertion qualification," Filed as U.S. Patent Application RPS920050058US3, November 19, 2007. - Issued as U.S. Patent 7900181, March 01, 2011. 24) A. Hekmatpour, Azadeh Salehi "Schema-Based Web-Portal Architecture For Assessment and Integration of Silicon IPs," Filed as U.S. Patent Application RPS920060004US1, February 8, 2006. - Issued as U.S. Patent 7870381, January 11, 2011. 23) A. Hekmatpour, Azadeh Salehi "Systems, Methods, and Media for Block-based Assertion analysis," Filed as U.S. Patent Application RPS920050058US2, May 24, 2005. - Issued as U.S. Patent 7865853, January 04, 2011. 22) A. Hekmatpour, James Coulter "Generating an Optimized Regression Test Suite database for Functional Verification of Microprocessors," Filed as U.S. Patent Application RPS92004005US1, June 9, 2004. - Issued as U.S. Patent 7711992, May 4, 2010. 21) A. Hekmatpour, Azadeh Salehi "Dynamic Schema-based Silicon IP analysis, qualification, Design Data exchange and Integration," Filed as U.S. Patent Application RPS920060003US1, February 8, 2006. - Issued as U.S. Patent 7571184, August 4, 2009. 20) A. Hekmatpour, James Coulter "A System and Method for Test Regression Database Optimization," Filed as U.S. Patent Application RPS920040051US1, June 09, 2004. - Issued as U.S. Patent 7512839, March 11, 2009. 19) A. Hekmatpourr "XML-based system and method for collaborative web-based design and verification of system-on-a-chip," Filed as U.S. Patent Application RAL920000098US2, September 8, 2005. - Issued as U.S. Patent 7483913, January 27, 2009. 18) A. Hekmatpourr "Database mining method and computer readable medium carrying instructions for coverage analysis of functional verification of integrated circuit designs," Filed as U.S. Patent Application RPS920030129US2, December 12, 2005. - Issued as U.S. Patent 7467364, December 16, 2008. 17) A. Hekmatpour, James Coulter "A System and Method for Algorithmic Hierarchical Regression Test Suite Modeling," Filed as U.S. Patent Application RPS920040051US1, June 09, 2004. - Issued as U.S. Patent 7320090, January 15, 2008. 16) A. Hekmatpour, Azadeh Salehi "Systems, Methods, and Media For Block-based Assertion Generation," Filed as U.S. Patent Application RPS920050058US1, May 24, 2005. - Issued as U.S. Patent 7313772, December 25, 2007. 15) A. Hekmatpour, "Methods, Systems, and Media For Management of Functional Verification of Advanced Processors," Filed as U.S. Patent Application RPS920040050US1, June 9, 2004. - Issued as U.S. Patent 7278056, October 02, 2007. 14) A. Hekmatpour, "A Formal Database Mining System and Method for Coverage Analysis of Functional Verification of Integrated Circuit Designs," Filed as U.S. Patent Application RPS920030129US2, November 12, 2003. - Issued as U.S. Patent 7007251, February 28, 2006. 13) A. Hekmatpour, "An XML-based System and Method for Collaborative Web-based Design and simulation of System-on-a-Chip," Filed as U.S. Patent Application RAL920000098US1, April 23, 2001. - Issued as U.S. Patent 6968346, November 22, 2005. 12) A. Hekmatpour, "A System and Method for Coverage-based Test Spec Optimizatin for Directed Psuedo Random Test Generation for Microprocessor Verification," Filed as U.S. Patent Application AUS919990333US1, May 25, 2000. - Issued as U.S. Patent 6647513, November 11, 2003. 11) A. Hekmatpour, "System and Method for Predicting Design Errors in Integrated Circuits," Filed as U.S. Patent Application US1999000460829, December 14, 1999. - Issued as U.S. Patent 6584455, June 24, 2003. 10) A. Hekmatpour, "System and Method for Recovering From Design Errors in Integrated Circuits," Filed as U.S. Patent Application US1999000460843, December 14, 1999. - Issued as U.S. Patent 6553548, April 22, 2003. 9) A. Hekmatpour, "A System and Method for Coverage-based Test Regression Generation and Optimization for Integrated Circuits Functional Verification," Filed as U.S. Patent Application AUS920010438US1, May 17, 2001. - Issued as U.S. Patent 6523151, February 18, 2003. 8) A. Hekmatpour, "A System and Method for Template-Based Development of Hypermedia Information Systems," Filed as U.S. Patent Application BU994008C, April 30, 1998. - Issued as U.S. Patent 6052676, April 18, 2000. Winner of 2000 IBM Microelectronics Division Top 5% Patents 7) A. Hekmatpour, "An adaptive method and system for management and dissemination of Hypermedia Information," Filed as U.S. Patent Application BU994008VB, January 10, 1997. - Issued as U.S. Patent 5870768, February 9, 1999. 6) A. Hekmatpour, "A System and Method for Hierarchical Modeling of Dynamic Expertise and Decision Making," Filed as U.S. Patent Application BU994008E, December 27, 1996. - Issued as U.S. Patent 5822745, October 13, 1998. 5) A. Hekmatpour, "An entropy-based hierarchical Knowledge-based inferencing architecture," Filed as U.S. Patent Application BU994008F on December 27, 1996. - Issued as U.S. Patent 5806056, September 8, 1998. 4) A. Hekmatpour, "Adaptive hypermedia presentation method and system," Filed as U.S. Patent Application BU994008V, September 25, 1995. - Issued as U.S. Patent 5799292, August 25, 1998. 3) A. Hekmatpour, "A Hierarchical Knowledge-based method for Hypermedia Information Management and Navigation," Filed as U.S. Patent Application BU994008B on December 27, 1996. - Issued as U.S. Patent 5720007, February 17, 1998. 2) A. Hekmatpour, "A System and Method for Interactive Knowledge-based training," Filed as U.S. Patent Application BU994008D, December 27, 1996. - Issued as U.S. Patent 5696885, December 09, 1997. Winner of 1998 IBM Microelectronics Division Top 5% Patents 1) A. Hekmatpour, "Expert System and Method Employing Hierarchical Knowledge Base, and Interactive Multimedia/Hypermedia Applications," Filed as U.S. Patent Application BU994008A, April 29, 1994. - Issued as U.S. Patent 5644686, July 01, 1997.

Publications A. Hekmatpour, L. Perfetti, J. Jullian, "Challenges and Opportunities in Evaluating and Selecting a Hospital Information System (HIS) to Replace Existing Health Care System and Processes," The Fourth International Conference on Networked Digital Technologies (NDT 2012), Canadian University of Dubai, Dubai April 24-26, 2012 A. Hekmatpour, A. Salehi, J. Coulter, "An XML-based Collaborative Framework for ASIC eDesign," Special Issue of the Journal of Computational Methods in Science and Engineering (JCMSE), 2006, published by the IOS Press, The Netherlands. A. Hekmatpour, A. Salehi, "Block-based Schema-driven Assertion Generation for Functional Verification," Proc. of 14th IEEE Asian Test Symposium, ATS 2005, December 2005, Kolkata India. A. Hekmatpour, F. Keyser, H. Shah, M. Hale, "Fast Track Third Party IP Core Integration - An efficient Two Pass IP-Based ASIC Design and Verification Methodology," Proc. of GSPx 2005, October 2005, Santa Clara, California. A. Hekmatpour, K. Goodnow, H. Shah, "Standards-Compliant IP-Based ASIC and SoC Design," Proc. of IEEE International SOC Conference, September 2005, Washington D.C. A. Hekmatpour, C. Alley, B. Stempel, J. Coulter, A. Salehi, C. Palenchar, A. Shafie, "A Heterogeneous Coverage-Directed Assertion-Based Verification Platform," Proc. of IEEE Custom Integrated Circuits Conference (CICC), September 2005, San Jose California. A. Hekmatpour, K. Goodnow, "Standards-compliant Silicon IP Design - Advantages, Problems, and Future Directions," Proc. of DesignCon East Conference, Sept. 2005, Boston.  (Winner of the Best Paper Award in Chip-Level Design Category at DesignCon East 2005) A. Hekmatpour, A. Shafie, A. Salehi, "An Extensible Notation and Format for Formal Specification, Capture and Exchange of the Architectural and Microarchitectural Attributes of Test Programs and Simulation Environments," ip.com, Document ID = IPCOM00012xxxxx, August 2005. A. Hekmatpour, A. Shafie, "Architectural and Microarchitectural Attribute Extraction and Analysis for Simulation-based Functional Verification of Integrated Circuit Designs," ip.com, Document ID = IPCOM000126677D, July 2005. A. Hekmatpour, "An Integrated System and Architecture for Seamless Modeling of Functional Verification and Analysis of Simulation Results," ip.com, Document ID = IPCOM000124602D, April 2005. A. Hekmatpour, J. Coulter, A. Salehi, "FoCuS: A Dynamic Regression Suite Generation Platform for Processor Functional Verification," Proc. of 20th International Conference on Computers and Their Applications, CATA05, New Orleans, March 16-18, 2005. A. Hekmatpour, J. Coulter, A. Salehi, "An XML-based Collaborative Framework for ASIC eDesign," Proc. of Third International Conference on Computer Science, Software Engineering, Information Technology, e-Business, and Applications, CSITeA04, Dec. 27-29, 2004, Cairo Egypt. A. Hekmatpour, A. Salehi, "A Database Mining Methodology for Efficient Coverage-Driven Functional Verification", Proc. of Global Signal Processing Expo and Conference, GSPX 2004. A. Hekmatpour, B. Devins, D. Robert, M. Hale "An Integrated Methodology and Flow for SoC Design, Verification, and Application Development," Proc. of Global Signal Processing Expo and Conference, GSPx 2004. A. Hekmatpour, S. Kakkar "Advanced Processor Architectures: The Verification Challenge - An overview of functional verification progress including Random TG, Coverage, CDTG, CDV, FV, ABV", TechForum presented at the DesignCon East Conference, Boston, April 5-7, 2004. A. Hekmatpour, J. Coulter, "Coverage-Directed Management and Optimization of Random Functional Verification," Proc. of International Test Conference, Charlotte NC, Sept. 2003. A. Hekmatpour, I. Dawood and P. Kalyanasundaram, "On Teaching and Collaborative Development of Web-based Multimedia Knowledge-Based Systems," WebNet 96, World Conference Of the WEB Society,San Francisco, October 16-19, 1996. A. Hekmatpour and Susie Prestone, "Can/Should Eighth Grade Students Design Interactive Hypermedia Courseware? A report on an IBM Technology Dissemination Project," Proc. of the World Conference on Educational Multimedia and Hypermedia (ED-MEDIA 95), Graz, Austria, June 1995. A. Hekmatpour, "An Adaptive Presentation Model for Educational Hypermedia Systems," Journal of Educational Multimedia and Hypermedia, Vol. 4, NO. 3,November 1995. A. Hekmatpour, "A Multimedia Methodology and Architecture for Computer-Aided Training and Certification, International Journal of Computers and Their Applications, Vol. 1, No. 2, December 1994. A. Hekmatpour, "ExperMedia/2: A Hypermedia Application Develeopment Shell," Video Program and Proc. of 2nd ACM International Conference on Multimedia, San Francisco, October 1994. A. Hekmatpour, Eric Millham, Larry Grant," MUTANT: A Multimedia Shell for Development of Computer-Aided Training and Certification Applications," Proc. of the ISCA (International Society for Computers and Their Applications) International Conference on Computer Applications in Industry and Engineering, pp. 37-41, Honolulu, Hawaii, Dec. 15-17, 1993. A. Hekmatpour, E. Millham, and L. Grant, "ExperMedia/2: An OS/2 Multimedia Expert System Shell for Domain Experts," Presented at the World Conference on Educational Multimedia and Hypermedia (ED-MEDIA 93), Association for the Advancement of Computing in Education (AACE), Orlando, Florida, June 1993. A. Hekmatpour, G. Brown, and R. Magnuson, "OGODA: A Multimedia Knowledge Based System for Thermco Furnace Diagnostics and Operator Training," TR-19.1008, IBM Vermont, June 1993. A. Hekmatpour, G. Brown, R. Brault, G. Bowen, L. Grant, and E. Millham, "FTDD973: A Multimedia Knowledge Based System and Methodology for Operator Training and Diagnostics,i" Proc. of Conference on Intelligent Computer -Aided Training and Virtual Environment Technology (ICAT/VET-93), NASA/Johnson Space Center, Houston, Texas, May 1993. A. Hekmatpour and C. Elkan, "A Multimedia Expert System for Wafer Polisher Maintenance," Proc. of the Ninth IEEE Conference on Artificial Intelligence Applications (CAIA), Orlando, Florida, March 1993. A. Hekmatpour and C. Elkan, " Categorization-Based Diagnostic Problem Solving in the VLSI Design Domain, " Proc. of the Ninth IEEE Conference on Artificial Intelligence Applications (CAIA), Orlando, Florida, March 1993. (Winner of the Best Paper Award) A. Hekmatpour, "WESDA: A Multimedia-Based Expert System for WESTECH Wafer Polisher Diagnosis and Maintenance," Technical Report TR-19.0991, IBM, October 1992. A. Hekmatpour and L. Grant, "Knowledge-Based Diagnostic Support Shell," Proc. of IBM Interdivisional Technical Liaison Conf. on Expert Systems, Yorktown Heights, New York, pp. 230-237, October 1992. A. Hekmatpour and L. Grant, "Intelligent Multimedia Systems for Tool Diagnosis and Maintenance," Proc. of IBM Symposium of Productivity in Manufacturing, Advanced Semiconductor Technology Center (ASTC), Fishkill, New York, October 1992. A. Hekmatpour and C. Elkan "A Multimedia Expert System for Wafer Polisher Maintenance," Technical Report #CS92-257, Dept. of Computer Science and Engineering, University of California, San Diego, August 1992. A. Hekmatpour and C. Elkan "A Case-Based Expert System for Recovery from Errors in the VLSI Design Process," Technical Report #CS92-256, Dept. of Computer Science and Engineering, University of California, San Diego, August 1992. A. Hekmatpour, A. Orailoglu, and P. Chau, "Hierarchical Modeling of the VLSI Design Process," IEEE EXPERT, Special Track on Object-Oriented Programming in AI, April 1991. A. Hekmatpour, A. Vassigh, and D. Norman, "Conceptual Modeling for Expert System User Interface Development," Proc. of 7th International Association of Science and Technology for Development (IASTED) International Symposium on Expert Systems Theory and Applications, Long Beach, California, December 1990. A. Hekmatpour and P. Chau, "KINDEN: Knowledge-Based INtelligent VLSI Design ENvironment," Proc. of AI Systems In Government (AISIG) conference, Washington D.C., May 1990. A. Hekmatpour and P. Chau, "AI Techniques and Object-Oriented Technology for VLSI Design-Space Representation, Optimization, and Management," Applications of Artificial Intelligence VIII Conference, Proc. of SPIE (The International Society for Optical Engineering), Vol. 1293, Orlando, Florida, April 1990. A. Hekmatpour, S. Powell, and P. Chau, "KINFIDA: An Object-Oriented Model-Based Digital Filter Design Assistant," Proc. of IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Albuquerque, New Mexico, April 1990. A. Hekmatpour, A. Orailoglu, and P. Chau, "KINTESS: A Knowledge-Based Expert System CAD for ASIC Technology Selection," Proc. of GOvernment Microcircuit Applications Conference (GOMAC), Orlando, Florida, November 1989. T. Hamada, A. Hekmatpour, R. Carden, T. Kammeyer, and P. Chau, "EDIF Activities at UCSD VLSI-DSP CAD Laboratory," Proc. of 5th EDIF User Group Workshop, San Jose, California, September 1989. A. Hekmatpour, and B. Winter, "TMS: Technology Mapping System; Results and Future Plans," Proc. of IBM Circuit and Design Automation Conference, Austin, Texas, pp. 64-68, February 1985. J. Gilkinson, S. Lewis, B. Winter, and A. Hekmatpour, "Automated Technology Mapping," IBM Journal of Research and Development, Vol. 28, No. 5, pp. 546-556, September 1984.

© Copyrights A. Hekmatpour, "A Methodology and Architecture for Interactive Knowledge-Based Diagnostic Problem Solving in VLSI Manufacturing," TX 3-758-975, USA, Feb. 22 1994. A. Hekmatpour, IBM, "ExperMedia, ExperMedia/2, EM, EM/2, and ExperMedia Logos", 1993. A. Hekmatpour, "RimaTech, Rima Technologies and Rima", 1995. A. Hekmatpour, "FarsiNet, FarsiWorld, ParsWorld, NetPal, CyberPal, CyberChurch, CyberCafe", 1996.

Teaching I have enjoyed developing and teaching undergraduate and graduate level courses in the fields of Electronics, Information systems, Intelligent Systems, Design Automation, Multimedia Expert Systems, Manufacturing Process Control & Optimization and Invention and Patenting Process - through the IBM University Relations and the United Nations TOKEN (Transfer of Knowledge Through Expatriate Nationals) programs at the Rochester Community College in Minnesota, the University of Texas in Austin, University of California San Diego, University of Ferdowsi in Mashhad Iran, as well as IBM's internal technical training academy. A. Hekmatpour, "Turning your ideas to an Invention - IBM's Disclosure Process - Patent Factory," IBM Research Triangle Park, North Carolina, Summer 2004. A. Hekmatpour, "Web-based Application Development," Introduction to HTML 3.0, Hypermedia, GUI, Web performance issues and practical guidlines to user friendly Online documentation using HTML and CGI Scripting, Somerset Design Center, Austin, Fall 96. A. Hekmatpour, "MMKBS: Multimedia Knowledge-Based Systems," Theory and principles of developing intelligent multimedia information systems, UT Austin, ECE Graduate Course, Spring 1996. A. Hekmatpour, " Online MMKBS for integrated production management," IBM HD Head Manufacturing, San Jose, Spring 1995. A. Hekmatpour, "Hybrid Expert Systems: Theory, Architectures, and Tools," University of Ferdowsi, Mashhad, Iran, Fall 1994. A. Hekmatpour, "ExperMedia/2: A Multimedia Expert System Shell," IBM Manufacturing Technology Center, Boca Raton, Florida, Spring 1994. A. Hekmatpour, "Expert Systems: Theory, Inferencing, and Knowledge Representation Architectures," University of Ferdowsi, ECE Dept., Mashhad, Iran, Summer 1993. A. Hekmatpour, "Interactive Knowledge-Based Systems for Manufacturing process management," IBM Vermont Manufacturing, Fall 1992. A Hekmatpour, "Logic Design," Rochester Community and Technical College, Rochester Minnesota, Fall 1983 Semester and Spring 1984 Semester.

Invited Talks A. Hekmatpour, "Invention Process and IBM's Invention Factory," SoC Development and Methodology Group, April 2004, Research Triangle park, North Carolina. A. Hekmatpour, "Information Highway: History and Future Potential of Internet," Association of Iranian Professionals of Austin Texas, Sept 1997. A. Hekmatpour, "Condition Action Tree: A decision tree architecture for procedural knowledge capture and representation," UCSD AI Seminar, Sponsored by the UCSD CSE Department, May , 1995. A. Hekmatpour, "Efficient Manufacturing Operation Support: Intelligent Multimedia Information Systems," UCSD Advanced Manufacturing Seminar, Sponsored by The UCSD Program in Advanced Manufacturing, May , 1995. A. Hekmatpour, "BioComputing: Technology, Terminologies, and Trends" and "Intelligent Computer Integrated Manufacturing," Presented two half day seminars at University of Ferdowsi, dept. computer engineering. Sponsored by the United Nations TOKTEN development program, August and September 1994. A. Hekmatpour, "Intelligent Multimedia User Interfaces," Presented at the tenth IEEE Conference on Artificial Intelligence Applications (CAIA) conference, Intelligent User Interface Panel, March 1994. A. Hekmatpour, "Intelligent Multimedia Computer-Aided Operator Training and Certification" and "Distributed Multimedia Information Systems," Presented two half day seminars at University of Ferdowsi, dept. computer engineering. Sponsored by the United Nations TOKTEN development program, July & August 1993. A. Hekmatpour, "From 'read this, watch me, and show me what you know' To 'Multimedia-Based Training and Knowledge-Based Certification' in Semiconductor Manufacturing," Presented at the World Conference on Educational Multimedia and Hypermedia (ED-MEDIA 93), Orlando, Florida, June 1993.

Research Interests Distributed Healthcare Services and Collaboration Frameworks Intelligent Health Engines Autonomous Analytics Distant Healthcare Services Delivery and Management Healthcare Services Quality Assessment and Optimization Distributed and Colaborative Design and Verification Frameworks Data security and integrity across hardware & software systems Intelligent and Adaptive Design and Verification Frameworks Intelligent agents as guardians of network transaction security Hierarchical Design Space Modeling and Analysis VLSI design automation, Coverage-driven test generation, Coverage-driven functional verification, Functional coverage modeling and analysis Intelligent Multimedia Information Systems Intelligent Internet-based/Web-based Applications Intelligent Internet Search Agents Internet Knowledge Compilers Automated Internet Scanning and Knowledge-base compiling Internet-based Global Enterprise Management Internet-based Manufacturing Control/Automation/Management Artificial Intelligence: Autonomous Intelligent Agents Database Mining Decision Support Systems Knowledge Based Systems Expert Systems Knowledge Representation Knowledge Engineering Machine learning Human-Computer Interaction Graphical/Multimedia/Hypermedia User Interfaces Intelligent User Interfaces Adaptive User Interfaces User Cognitive/Conceptual Modeling and System Usability analysis CBT, CAT, CAL, ICAT, ICAL - Intelligent Computer Aided Learning Training and Decision Support Technologies Virtual reality, Artificial reality, Artificial life.

Awards 2011 Invention Achievement Award - 23rd, 24th & 25th patent issue. Silicon Solutions, High Speed Serial Links, IBM Systems & Technology Group, Denver, Colorado 2010 Invention Achievement Award - 22nd patent issue. Silicon Solutions, High Speed Serial Links, IBM Systems & Technology Group, Denver, Colorado 2009 Invention Achievement Award - 19th, 20th & 21th patent issue. Silicon Solutions, High Speed Serial Links, IBM Systems & Technology Group, Denver, Colorado 2008 Invention Achievement Award - 17th & 18th patent issue. Silicon Solutions, High Speed Serial Links, IBM Systems & Technology Group, Denver, Colorado 2007 Invention Achievement Award - 15th & 16th patent issue. Silicon Solutions, High Speed Serial Links, IBM Systems & Technology Group, Denver, Colorado 2006 Fifth Plateau Invention Achievement Award Silicon Solutions, IBM Research Triangle Park, North Carolina. 2006 Invention Achievement Award - 19th & 20th patent application, 14th patent issue. Silicon Solutions, IBM Research Triangle Park, North Carolina. 2005 Invention Achievement Award - 18th patent application, 13th patent issue. Silicon Solutions, IBM Research Triangle Park, North Carolina. 2004 Invention Achievement Award - 16th & 17th patent application. Silicon IP Development, IBM Research Triangle Park, North Carolina. 2004 Fourth Plateau Invention Achievement Award Silicon IP Development, IBM Research Triangle Park, North Carolina. 2003 Invention Achievement Award - 12th patent issue. Silicon IP Development, IBM Research Triangle Park, North Carolina. 2003 Invention Achievement Award - 11th patent issue. SoC Methodology Development, Research Triangle Park, North Carolina. 2003 Stock Options Award - Significant Contribution to IBM Business SoC Methodology Development, Research Triangle Park, North Carolina. 2003 Invention Achievement Award - 10th patent issue. SoC Methodology Development, Research Triangle Park, North Carolina. 2003 Invention Achievement Award - 9th patent issue, 14th & 15th patent application. SoC Methodology Development, Research Triangle Park, North Carolina. 2001 Invention Achievement Award, 12th & 13th patent application ASIC Design Center, IBM Research Triangle Park, North Carolina. 2001 IBM Microelectronics Division 2000 Top 5% Patent Award ASIC Design Center, IBM Research Triangle Park, North Carolina. 2000 Stock Options Award - Significant Contribution to IBM Business ASIC Design Center, IBM Research Triangle Park, North Carolina. 2000 Third Plateau Invention Achievement Award ASIC Design Center, IBM Research Triangle Park, North Carolina. 2000 Invention Achievement Award, 11th patent application ASIC Design Center, IBM Research Triangle Park, North Carolina. 1999 Invention Achievement Award, 9th and 10th patent application PowerPC Design Center, IBM Austin, Texas. 1998 Second Plateau Invention Achievement Award PowerPC Design Center, IBM Austin, Texas. 1998 IBM Microelectronics Division 1998 Top 5% Patent Award PowerPC Design Center, IBM Austin, Texas. 1998 Invention Achievement Award, 8th patent application PowerPC Design Center, IBM Austin, Texas. 1997 IBM Microelectronics General Manager's Teamwork Award PowerPC Design Center, IBM Austin, Texas. 1997 Invention Achievement Award, 7th patent application PowerPC Design Center, IBM Austin, Texas. 1997 First Plateau Invention Achievement Award PowerPC Design Center, IBM Austin, Texas. 1996 Informal Award PowerPC Design Center, IBM Austin, Texas. 1996 Invention Achievement Award 3rd, 4th, 5th & 6th patent application Multimedia Expert Systems Lab., IBM Austin, Texas. 1995 Invention Achievement Award 2nd patent application Multimedia Expert Systems Lab., IBM Austin, Texas. 1994 Invention Achievement Award, 1st patent application Knowledge-Based Systems, IBM Burlington, Vermont. 1993 Best Paper Award IEEE Artificial Intelligence Applications Conference. 1990 Achievement Award VLSI Design Automation, IBM Burlington, Vermont. 1987 IBM Resident Study Fellowship VLSI Design Automation, IBM Burlington, Vermont. 1984 Achievement Award VLSI Circuit Technology, IBM Rochester, Minnesota. 1981 Graduate School Honor Roll Scholarship Department of Information Engineering, University of Illinois, Chicago. 1980 Honor Roll Scholarship Department of Information Engineering, University of Illinois, Chicago.