Amir Hekmatpour

Junel , 2000

IBM Microelectronics Division has selected its most valuable patents for 2000, based on the assessment of the value they bring to IBM and MD. Selection criteria included technological significance; use of the invention in current or future products; and use of the invention in alliances, joint ventures and licensing.

The Supplemental Patent Awards were established as part of IBM's Corporate Patent Process. These awards are given each year to the most valuable patents from each division that issued during the previous calendar year. Inventors of the top five percent of these patents receive $4,500, and inventors of the next 20-25 percent receive $1,000.

The inventors of MD's top five percent and next 20-25 percent most valuable patents recently received their awards. This is the first in a series of bulletins congratulating them.

Following are the inventors of MD's top five percent most valuable patents:

  • H. J. Golden, I. S. Mahmoud and James Spalik, U.S. Patent 5,615,827, "Flux Composition and Corresponding Soldering Method."
  • Charles F. Carey, Voya Markovich, Douglas O. Powell, Gary P. Vlasak and Richard S. Zarr, U.S. Patent 5,597,469, "Process for Selective Application of Solder to Circuit Packages."
  • Miguel A. Jimarez and Amit Sarkhel, U.S. Patent 5,655,703, "Solder Hierarchy for Chip Attachment to Substrates."
  • Thomas M. Culnane, Michael A. Gaynes and Hussain Shaukatullah, U.S. Patent 5,672,548, "Method for Attaching Heat Sinks Directly to Chip Carrier Modules."
  • George M. Lattimore, Michael K. Ciraula, Manoj Kumar, Dieter F. Wendel and Friedrich-Christian Wernicke, U.S. Patent 5,615,168, "Method and Apparatus for Synchronizing Pipeline Data Access of a Memory System."
  • Robert P. Masleid and L. B. Phillips, U.S. Patent 5,656,963, "Clock Distribution Network for Reducing Clock Skew."
  • Richard L. Arndt, James O. Nicholson, Edward J. Silha, Steve M. Thurber and Amy M. Tuvell, U.S. Patent 5,701,495, "Scalable System Interrupt Structure for a Multiprocessing System."
  • John S. Muhich, Ronald X. Arroyo and Charles G. Wright, U.S. Patent 5,640,518, "Addition of Pre-last Transfer Acknowledge Signal to Bus Interface to Eliminate Data Bus Turnaround on Consecutive Read and Write Tenures to Allow Burst Transfers of Unknown Length."
  • Toshiaki Kirihata, U.S. Patent 5,615,164, "Latched Row Decoder for a Random Access Memory."
  • L. Scalia, U.S. Patent 5,670,187, "Apparatus for In Situ Green Sheet Slitting."
  • Leping Li, Arnold Halperin and Steven G. Barbee, U.S. Patent 5,660,672, "In-Situ Monitoring of Conductive Films on Semiconductor Wafers."
  • Henry A. Nye III and Paul A. Totta, U.S. Patent 5,629,564, "Electroplated Solder Terminal."
  • Krishna G. Sachdev, Keith S. Olsen and Sushumna Iruvanti, U.S. Patent 5,591,789, "Polyester Dispersants for High Thermal Conductivity Paste."
  • Leping Li, Arnold Halperin and Steven G. Barbee, U.S. Patent 5,659,492, "Chemical Mechanical Polishing Endpoint Process Control."
  • Hans C. Pfeiffer and Werner Stickel, U.S. Patent 5,633,507, "Electron Beam Lithography System with Low Brightness."
  • Christopher P. Ausschnitt, U.S. Patent 5,629,772, "Monitoring of Minimum Features on a Substrate."
  • David E. Douse, Wayne F. Ellis and Erik L. Hedberg, U.S. Patent 5,703,823, "Memory Device with Programmable Self-Refreshing and Testing Methods Thereof."
  • Matthew J. Rutten, William F. Landers and D. Schaffer, U.S. Patent 5,676,587, "Selective Polish Process for Titanium, Titanium Nitride, Tantalum and Tantalum Nitride."
  • Amir Hekmatpour, U.S. Patent 5,696,885, "Expert System and Method Employing Hierarchial Knowledge Base, and Interactive Multimedia/ Hypermedia Applications."
  • Ram Kelkar and I. I. Novof, U.S. Patent 5,680,076, "Phase-Lock Indicator Circuit with Phase-Only Detection."
  • Steven H. Voldman, U.S. Patent 5,610,791, "Power Sequence Independent Electrostatic Discharge Protection."
  • David W. Milton, U.S. Patent 5,640,339, "Cache Memory Including Master and Local Word Lines Coupled to Memory Cells."
  • C. W. Kaanta, Randy W. Mann, D. Meulemans and Gorden S. Starkey, U.S. Patent 5,677,563, "Gate Stack Structure of a Field Effect Transistor."
  • Peter J. Geiss and D. M. Kenney, U.S. Patent 5,635,419, "Porous Silicon Trench and Capacitor Structures."
  • Brian Machesney, Jack A. Mandelman and Edward J. Nowak, U.S. Patent 5,670,388, "Method of Making Contacted Body Silicon-On-Insulator Field Effect Transistor."

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